Address | Width | Meaning |
7C00.03CF/C0 | b | ext video mem address: lo byte |
7C00.03CF/C1 | b | ext video mem address: mid byte |
7C00.03CF/C2 | b | ext video mem address: hi byte + (horiz phase shift << 5) |
7C00.03CF/C3 | b | ext video source width: lo byte |
7C00.03CF/C4 | b | ext video source width: hi 2 bits + (ext video source height << 4) |
7C00.03CF/C5 | b | ext video horiz start pixel: lo byte |
7C00.03CF/C6 | b | ext video horiz start pixel: hi byte |
7C00.03CF/C7 | b | ext video horiz end pixel: lo byte |
7C00.03CF/C8 | b | ext video horiz end pixel: hi byte |
7C00.03CF/C9 | b | ext video vert start line: lo byte |
7C00.03CF/CA | b | ext video vert start line: hi byte |
7C00.03CF/CB | b | ext video vert end line: lo byte |
7C00.03CF/CC | b | ext video vert end line: hi byte |
7C00.03CF/CD | b | ext video source win width: lo byte |
7C00.03CF/CE | b | ext video color compare: red |
7C00.03CF/CF | b | ext video color compare: green |
7C00.03CF/D0 | b | ext video color compare: blue |
7C00.03CF/D1 | b | ext video horiz DAA init value: lo byte |
7C00.03CF/D2 | b | ext video horiz DAA init value: hi byte |
7C00.03CF/D3 | b | ext video horiz DAA incr: lo byte |
7C00.03CF/D4 | b | ext video horiz DAA incr: hi byte |
7C00.03CF/D5 | b | Extended Video Vertical DDA Initial Value Low |
7C00.03CF/D6 | b | Extended Video Vertical DDA Initial Value High |
7C00.03CF/D7 | b | Extended Video Vertical DDA Increment Value Low |
7C00.03CF/D8 | b | Extended Video Vertical DDA Increment Value High |
7C00.03CF/D9 | b | Extended Video Format Control; video capture
0=4:2:2 YUV, 1=5:5:5 RGB, 2=5:6:5 RGB, 3=8:8:8 RGB, 4=8:8:8 RGB (32 bit) 0=0.5 linearity zoom-out, 8=duplicate pixel zoom-out 0x20=modify third duplicated pixel 0x40=double horiz pixels 0x80=UV offset by 128 |
7C00.03CF/DC | b | Extended Video display Control I
1=video pixels go to internal ram 2=ignore color compare register 4=do not clip to (16,235)(16,240) 8=U/V data is averaged 0x10=Y offset by 128 0x20=vert interpolation off 0x40=video out full window (no crt data) 0x80=enable video window |
7C00.03CF/E8 | b | Extended VFAC Control And Capture Mode I
1=capture enable 2=VFAC enable 4=freeze capture data 8=sync freeze capture data 0x10=select "valid frame" signal source 0x40=select Philips mode 0x80=modify vert interpolation clock |
7C00.03CF/E9 | b | Extended VFAC Control And Capture Mode II
1=invert the "video data valid" signal 2=invert the "graphic ready" output signal 4=invert the "data clock" input 8=invert the hsync input 0x10=invert the vsync input 0x20=invert the frame odd/even input 0x40=invert the blank output 0x80=invert the (other) vsync input |
7C00.03CF/EB | b | Extended Capture Memory Starting Address Low |
7C00.03CF/EC | b | Extended Capture Memory Starting Address Mid |
7C00.03CF/ED | b | Extended Capture Memory Starting Address High + (vid capt map width hi << 6) |
7C00.03CF/EE | b | Extended Capture Memory Fetch Pitch Low |
7C00.03CF/EF | b | Extended Capture Control Miscellaneous
1=horiz divide factor 2=horiz divide factor is 4 4=odd/even frame signals data good 8=HSYNC divided by 2 0x10=SYNCTZ set hi 0x20=SYNCTZ or'd 0x40=?? 0x80=video display has been used |
7C00.03CF/60 | b | Extended Capture Horizontal Starting Low |
7C00.03CF/61 | b | Extended Capture Horizontal Starting High |
7C00.03CF/62 | b | Extended Capture Horizontal Ending Low |
7C00.03CF/63 | b | Extended Capture Horizontal Ending High |
7C00.03CF/64 | b | Extended Capture Vertical Starting Low |
7C00.03CF/65 | b | Extended Capture Vertical Starting High |
7C00.03CF/66 | b | Extended Capture Vertical Ending Low |
7C00.03CF/67 | b | Extended Capture Vertical Ending High |
7C00.03CF/68 | b | Extended Capture Horizontal DDA Initial Value Low |
7C00.03CF/69 | b | Extended Capture Horizontal DDA Initial Value High |
7C00.03CF/6A | b | Extended Capture Horizontal DDA Increment Value Low |
7C00.03CF/6B | b | Extended Capture Horizontal DDA Increment Value High |
7C00.03CF/6C | b | Extended Capture Vertical DDA Initial Value Low |
7C00.03CF/6D | b | Extended Capture Vertical DDA Initial Value High |
7C00.03CF/6E | b | Extended Capture Vertical DDA Increment Value Low |
7C00.03CF/6F | b | Extended Capture Vertical DDA Increment Value High |
7C00.03CF/80 | b | Extended Capture Pip Horizontal Starting Low |
7C00.03CF/81 | b | Extended Capture Pip Horizontal Starting High |
7C00.03CF/82 | b | Extended Capture Pip Horizontal Ending Low |
7C00.03CF/83 | b | Extended Capture Pip Horizontal Ending High |
7C00.03CF/84 | b | Extended Capture Pip Vertical Starting Low |
7C00.03CF/85 | b | Extended Capture Pip Vertical Starting High |
7C00.03CF/86 | b | Extended Capture Pip Vertical Ending Low |
7C00.03CF/87 | b | Extended Capture Pip Vertical Ending High |
7C00.03CF/8A | b | Extended Video Chroma Compare Register Red High |
7C00.03CF/8B | b | Extended Video Chroma Compare Register Red Low |
7C00.03CF/8C | b | Extended Video Chroma Compare Register Green High |
7C00.03CF/8D | b | Extended Video Chroma Compare Register Green Low |
7C00.03CF/8E | b | Extended Video Chroma Compare Register Blue High |
7C00.03CF/8F | b | Extended Video Chroma Compare Register Blue Low |
7C00.03CF/A0 | b | Extended Horizontal Video Scramble Seed Number Low |
7C00.03CF/A1 | b | Extended Vertical Video Scramble Seed Number Low |
7C00.03CF/A2 | b | Extended Horizontal/Vertical Video Scramble Seed Number High |
7C00.03CF/A4 | b | Extended CCIR656 Capture Mode I
1=enable 8 bit data 2=use CCIR656 0x20=adjust UV |
7C00.03CF/A5 | b | Extended CCIR656 Capture Mode II |
7C00.03CF/A6 | b | Extended Video Bus Master I
1=bus master on 4=clear bus master |
7C00.03CF/A7 | b | Extended Video Bus Master Address Low |
7C00.03CF/A8 | b | Extended Video Bus Master Address Mid |
7C00.03CF/A9 | b | Extended Video Bus Master Address High |
7C00.03CF/AA | b | Extended Video Bus Master Address Offset |
7C00.03CF/AB | b | Extended Display ZRGB Control I |
7C00.03CF/AC | b | Extended Double Buffer Control I
1=flip buffers 2=close off a buffer 4=force buffer 0x10=flip status (read only) 0x20=clear flip status 0x40=flip request |
7C00.03CF/AD | b | Extended Double Buffer Starting Address AB High |
7C00.03CF/AE | b | Extended TV Control |
7C00.03CF/AF | b | Extended Test Control |
NAME | PORT | INDEX | VGA | RESET | ;Remarks |
Graphics Latched Data Readback n | 3D5 | 22 | RO | NO | ;crt to gc |
Attribute Toggle Readback | 3D5 | 24 | RO | No | ;crt to ac |
Attribute Index Readback | 3D5 | 26 | RO | No | ;crt to ac |
TV First Skip Line Address Low | 3D5 | 40 | R/W | ||
TV First Skip Line Address High | 3D5 | 41 | R/W | ||
TV Line Fetch Counter | 3D5 | 43 | R/W | ||
TV Max and Skip Lines | 3D5 | 44 | R/W | ||
TV Interpolated Miscellaneous Control | 3D5 | 45 | R/W | ||
TV First Delta Lines Address Low | 3D5 | 46 | R/W | ||
TV First Delta Lines Address High | 3D5 | 47 | R/W | ||
Extended Start Address | 3CF | 10 | R/W | YES | ;crt |
Extended CRT Vertical Overflow | 3CF | 11 | R/W | YES | |
Extended CRT IRQ Control | 3CF | 12 | R/W | YES | 1=emable irq |
Extended CRT Testing Reg | 3CF | 13 | R/W | YES | |
Extended Number Of Fetch Reg0 | 3CF | 14 | R/W | YES | |
Extended Number Of Fetch Reg1 | 3CF | 15 | R/W | YES | |
Extended HSYNC/VSYNC Control Reg | 3CF | 16 | R/W | YES | |
Extended CRT Vertical Counter 0 | 3CF | 18 | R/W | YES | |
Extended CRT Vertical Counter 1 | 3CF | 19 | R/W | YES | |
Extended Bus Control | 3CF | 30 | R/W | Yes | ;BIU
1=2MB ram 4=no wait states 0x20=enable PCI burst mode |
Extended Segment Write Pointer | 3CF | 31 | R/W | Yes | ;Biu |
Extended Segment Read Pointer | 3CF | 32 | R/W | Yes | ;Biu |
Extended BIU Miscellaneous Control | 3CF | 33 | R/W | Yes | ;Biu
1=linear memory enable |
Extended Linear Address 0 | 3CF | 34 | R/W | Yes | ;BIU |
Extended Linear Address 1 | 3CF | 35 | R/W | Yes | ;BIU |
Function Control | 3CF | 3C | R/W | Yes | ;Biu |
BIU Bus Master Control | 3CF | 3E | R/W | Yes | ;Biu
1=bus master enable 2=burst enable 4=back-to-back enable |
BIG ENDIAN Bus Swap | 3CF | 3F | R/W | Yes | ;Biu |
Bus Master Program Big ENDIAN Swap | 3CF | 3EX | R/W | Yes | ;Biu |
Bus Master Video Big ENDIAN Swap | 3CF | 3FX | R/W | Yes | ;Biu |
Extended V2 Video Memory Starting Address Low | 3CF | X40 | R/W | ||
Extended V2 Video Memory Starting Address Mid | 3CF | X41 | R/W | ||
Extended V2 Video Memory Starting Address High | 3CF | X42 | R/W | ||
Extended V2 Video Source Map Width Low | 3CF | X43 | R/W | ||
Extended V2 Video Source Map Width High | 3CF | X44 | R/W | ;64 bits | |
Extended V2 Video Display Horizontal Starting Pixel Low | 3CF | X45 | R/W | ||
Extended V2 Video Display Horizontal Starting Pixel High | 3CF | X46 | R/W | ||
Extended V2 Video Display Horizontal Ending Pixel Low | 3CF | X47 | R/W | ||
Extended V2 Video Display Horizontal Ending Pixel High | 3CF | X48 | R/W | ||
Extended V2 Video Display Vertical Starting Line Low | 3CF | X49 | R/W | ||
Extended V2 Video Display Vertical Starting Line High | 3CF | X4A | R/W | ||
Extended V2 Video Display Vertical Ending Line Low | 3CF | X4B | R/W | ||
Extended V2 Video Display Vertical Ending Line High | 3CF | X4C | R/W | ||
Extended V2 Video Display Memory Offset Phase | 3CF | X4D | R/W | ||
Extended Steeling Cycle A | 3CF | X4E | R/W | ||
Extended Steeling Cycle B | 3CF | X4F | R/W | ||
Extended Steeling Cycle C | 3CF | Y40 | R/W | ||
Extended Double Buffer Starting Address A Low | 3CF | Y41 | R/W | ||
Extended Double Buffer Starting Address A Mid | 3CF | Y42 | R/W | ||
Extended V2 Video Horizontal DDA Increment Value Low | 3CF | Y43 | R/W | ||
Extended V2 Video Horizontal DDA Increment Value High | 3CF | Y44 | R/W | ||
Extended Double Buffer Starting Address B Low | 3CF | Y45 | R/W | ||
Extended Double Buffer Starting Address B Mid | 3CF | Y46 | R/W | ||
Extended V2 Video Vertical DDA Increment Value Low | 3CF | Y47 | R/W | ||
Extended V2 Video Vertical DDA Increment Value High | 3CF | Y48 | R/W | ||
Extended V2 Video FIFO Low Control | 3CF | Y49 | R/W | ||
Extended V2 Video FIFO High Control | 3CF | Y4A | R/W | ||
Extended V2 Video Format Control | 3CF | Y4B | R/W | ||
Extended V2 Video Display Control I | 3CF | Y4C | R/W | ||
Extended V2 Video FIFO Control I | 3CF | Y4D | R/W | ||
Extended V2 Video Miscellaneous Control I | 3CF | Y4E | R/W | ||
Extended Steeling Cycle D | 3CF | Y4F | R/W | ||
Extended X2 Video Memory Starting Address Low | 3CF | J40 | R/W | ||
Extended X2 Video Memory Starting Address Mid | 3CF | J41 | R/W | ||
Extended X2 Video Memory Starting Address High | 3CF | J42 | R/W | ||
Extended X2 Video Source Map Width | 3CF | J43 | R/W | ||
Extended X2 Video Memory Source Map and Source Win. Width High | 3CF | J44 | R/W | ||
Extended X2 Video Display Horiz. Pipe Starting Pixel Low | 3CF | J45 | R/W | ||
Extended X2 Video Display Horiz. Pipe Starting Pixel High | 3CF | J46 | R/W | ||
Extended X2 Video Display Horizontal Starting Pixel Low | 3CF | J47 | R/W | ||
Extended X2 Video Display Horizontal Starting Pixel High | 3CF | J48 | R/W | ||
Extended X2 Video Display Horizontal Ending Pixel Low | 3CF | J49 | R/W | ||
Extended X2 Video Display Horizontal Ending Pixel High | 3CF | J4A | R/W | ||
Extended X2 Video Display Vertical Starting Line Low | 3CF | J4B | R/W | ||
Extended X2 Video Display Vertical Starting Line High | 3CF | J4C | R/W | ||
Extended X2 Video Display Vertical Ending Line Low | 3CF | J4D | R/W | ||
Extended X2 Video Display Vertical Ending Line High | 3CF | J4E | R/W | ||
Extended X2 Video Source Window Width | 3CF | J4F | R/W | ||
Extended X2 Video Horizontal DDA Initial Value Low | 3CF | K40 | R/W | ||
Extended X2 Video Horizontal DDA Initial Value High | 3CF | K41 | R/W | ||
Extended X2 Video Horizontal DDA Increment Value Low | 3CF | K42 | R/W | ||
Extended X2 Video Horizontal DDA Increment Value High | 3CF | K43 | R/W | ||
Extended X2 Video Vertical DDA Initial Value Low | 3CF | K44 | R/W | ||
Extended X2 Video Vertical DDA Initial Value High | 3CF | K45 | R/W | ||
Extended X2 Video Vertical DDA Increment Value Low | 3CF | K46 | R/W | ||
Extended X2 Video Vertical DDA Increment Value High | 3CF | K47 | R/W | ||
Extended X2 Video Format Control | 3CF | K48 | R/W | ||
Extended X2 Video display Control I | 3CF | K49 | R/W | ||
Extended X2 window Double Buffer Address Low | 3CF | K4A | R/W | ||
Extended X2 window Double Buffer Address Mid. | 3CF | K4B | R/W | ||
Extended X2 window Double Buffer Address High | 3CF | K4C | R/W | ||
Extended X2 window Control I | 3CF | K4D | R/W | ||
SPRITE HORIZONTAL START LO | 3CF | 50 | R/W | NO | ;ac |
SPRITE HORIZONTAL START HI | 3CF | 51 | R/W | NO | ;ac |
SPRITE HORIZONTAL PRESET | 3CF | 52 | R/W | NO | ;ac |
SPRITE VERTICAL START LO | 3CF | 53 | R/W | NO | ;ac |
SPRITE VERTICAL START HI | 3CF | 54 | R/W | NO | ;ac |
SPRITE VERTICAL PRESET | 3CF | 55 | R/W | NO | ;ac |
SPRITE CONTROL | 3CF | 56 | R/W | YES | ;ac |
Extended Attribute Control | 3CF | 57 | R/W | Yes | ;ac |
Extended Overscan Red | 3CF | 58 | R/W | Yes | ;ac |
Extended Overscan Green | 3CF | 59 | R/W | Yes | ;ac |
Extended Overscan Blue | 3CF | 5A | R/W | Yes | ;ac |
Extended COP Back Door | 3CF | 5B | RO | ;cop | |
Extended RAMDAC | 3CF | 5C | R/W | Yes | ;DAC Genesis |
Extended RAMDAC Clock Control | 3CF | 5D | R/W | Yes | ;ac |
Extended Capture Horizontal Starting Low | 3CF | 60 | R/W | ||
Extended Capture Horizontal Starting High | 3CF | 61 | R/W | ||
Extended Capture Horizontal Ending Low | 3CF | 62 | R/W | ||
Extended Capture Horizontal Ending High | 3CF | 63 | R/W | ||
Extended Capture Vertical Starting Low | 3CF | 64 | R/W | ||
Extended Capture Vertical Starting High | 3CF | 65 | R/W | ||
Extended Capture Vertical Ending Low | 3CF | 66 | R/W | ||
Extended Capture Vertical Ending High | 3CF | 67 | R/W | ||
Extended Capture Horizontal DDA Initial Value Low | 3CF | 68 | R/W | ||
Extended Capture Horizontal DDA Initial Value High | 3CF | 69 | R/W | ||
Extended Capture Horizontal DDA Increment Value Low | 3CF | 6A | R/W | ||
Extended Capture Horizontal DDA Increment Value High | 3CF | 6B | R/W | ||
Extended Capture Vertical DDA Initial Value Low | 3CF | 6C | R/W | ||
Extended Capture Vertical DDA Initial Value High | 3CF | 6D | R/W | ||
Extended Capture Vertical DDA Increment Value Low | 3CF | 6E | R/W | ||
Extended Capture Vertical DDA Increment Value High | 3CF | 6F | R/W | ||
Extended Memory Controller 0 | 3CF | 70 | R/W | Yes | ;seq
1=7 clocks per mem cycle, 0=6 clocks 2=extend RAS precharge by 1 4=RAS to CAS insert 1 8=multiple CAS mode, 0=multiple WE mode 0x10=CAS without RAS enabled 0x40=FIFO clear 0x80=reset memory sequencer |
Extended Memory Controller 1 | 3CF | 71 | R/W | Yes | ;seq
4=use SDRAM chips 8=use VRAM chips 0x10=4k refresh, 0=2k refresh |
Extended Memory Controller 2 | 3CF | 72 | R/W | Yes | ;seq
1=2Megs of ram 4=64 bit wide ram refresh rate & interleave control |
Extended Hidden Control 1 | 3CF | 73 | R/W | Yes | ;seq
4=EDO enable |
Extended FIFO Control 0 | 3CF | 74 | R/W | Yes | ;seq |
Extended FIFO Control 1 | 3CF | 75 | R/W | Yes | ;seq |
Extended SEQ Programmable | 3CF | 76 | R/W | Yes | ;seq |
Extended SEQ Miscellaneous | 3CF | 77 | R/W | Yes | ;seq |
Extended Hidden Control 2 | 3CF | 78 | R/W | Yes | ;seq |
Extended Hidden Control 3 | 3CF | 79 | R/W | Yes | ;seq |
Extended Hidden Control 4 | 3CF | 7A | R/W | Yes | ;seq |
Extended Scratch Control | 3CF | 7B | R/W | Yes | ;seq |
Sprite Data Location Low | 3CF | 7E | R/W | Yes | ;seq |
Sprite Data Location High | 3CF | 7F | R/W | Yes | ;seq |
Extended Capture Pip Horizontal Starting Low | 3CF | 80 | R/W | ||
Extended Capture Pip Horizontal Starting High | 3CF | 81 | R/W | ||
Extended Capture Pip Horizontal Ending Low | 3CF | 82 | R/W | ||
Extended Capture Pip Horizontal Ending High | 3CF | 83 | R/W | ||
Extended Capture Pip Vertical Starting Low | 3CF | 84 | R/W | ||
Extended Capture Pip Vertical Starting High | 3CF | 85 | R/W | ||
Extended Capture Pip Vertical Ending Low | 3CF | 86 | R/W | ||
Extended Capture Pip Vertical Ending High | 3CF | 87 | R/W | ||
Extended Capture New Control I | 3CF | 88 | R/W | ||
Extended Capture New Control II | 3CF | 89 | R/W | ||
Extended Video Chroma Compare Red High | 3CF | 8A | R/W | ||
Extended Video Chroma Compare Red Low | 3CF | 8B | R/W | ||
Extended Video Chroma Compare Green High | 3CF | 8C | R/W | ||
Extended Video Chroma Compare Green Low | 3CF | 8D | R/W | ||
Extended Video Chroma Compare Blue High | 3CF | 8E | R/W | ||
Extended Video Chroma Compare Blue Low | 3CF | 8F | R/W | ||
Extended Graphics Control | 3CF | 90 | R/W | Yes | ;gc |
Extended Chip ID 0 (Data=A1) | 3CF | 91 | RO | No | ;gc (new ID) |
Extended Chip ID 1 (Data=03) | 3CF | 92 | RO | No | ;gc |
Extended Chip ID 2 (Data=00) | 3CF | 93 | RO | No | ;gc |
Extended Scratch 0 | 3CF | 94 | R/W | Yes | ;gc |
Extended Scratch 1 | 3CF | 95 | R/W | Yes | ;gc |
Extended Scratch 2 | 3CF | 96 | R/W | Yes | ;gc |
Extended Scratch 3 | 3CF | 97 | R/W | Yes | ;gc |
Bus Master Video Low Address | 3CF | 98 | R/W | Yes | ;gc cancelled |
Bus Master 3D Write Low Address | 3CF | 99 | R/W | Yes | ;gc cancelled |
Bus Master 3D Read Low Addrerss | 3CF | 9A | R/W | Yes | ;gc |
Bus Master High Address | 3CF | 9B | R/W | Yes | ;gc |
Bus Master Control 0 | 3CF | 9C | R/W | Yes | ;gc |
Bus Master Control 1 | 3CF | 9D | R/W | Yes | ;gc |
Extended Write FIFO MISC | 3CF | 9E | R/W | Yes | ;gc |
Extended Horizontal Video Scramble Seed Number Low | 3CF | A0 | R/W | ||
Extended Vertical Video Scramble Seed Number Low | 3CF | A1 | R/W | ||
Extended Horizontal/Vertical Video Scramble Seed Number High | 3CF | A2 | R/W | ||
Extended Enhence Control I | 3CF | A3 | R/W | ||
Extended CCIR656 Capture Mode I | 3CF | A4 | R/W | 3=enable 8 bit capture mode
4=ignore VGT 0x10=use alternate FIFO for capture 0x20=swap U & V bytes 0x40=mirror vertical 0x80=mirror horiz |
|
Extended CCIR656 Capture Mode II | 3CF | A5 | R/W | ||
Extended Video Bus Master I | 3CF | A6 | R/W | ||
Extended Video Bus Master Address Low | 3CF | A7 | R/W | ||
Extended Video Bus Master Address Mid | 3CF | A8 | R/W | ||
Extended Video Bus Master Address High | 3CF | A9 | R/W | ||
Extended Video Bus Master Address Offset Low | 3CF | AA | R/W | ||
Extended Display ZRGB Control I | 3CF | AB | R/W | ||
Extended Double Buffer Control I | 3CF | AC | R/W | ||
Extended Double Buffer Starting Address AB High | 3CF | YAD | R/W | ||
Extended TV Control | 3CF | YAE | R/W | ||
Extended Test Control | 3CF | YAF | R/W | ||
Extended VCLK Parameter 0 | 3CF | B0 | R/W | default | ;vcg |
Extended VCLK Parameter 1 | 3CF | B1 | R/W | default | ;vcg |
Extended MCLK Numerator 0 | 3CF | B2 | R/W | default | ;vcg |
Extended MCLK Numerator 1 | 3CF | B3 | R/W | default | ;vcg |
Extended Jumper Latch 0 | 3CF | B4 | R/W | latch | ;vcg |
Extended Jumper Latch 1 | 3CF | B5 | R/W | latch | ;vcg |
Extended Jumper Latch 2 | 3CF | B6 | R/W | latch | ;vcg |
Extended Feature Connector | 3CF | B7 | R/W | default | ;vcg |
Extended Jumper Latch 3 | 3CF | B8 | R/W | latch | ;vcg |
Extended MISC CLK | 3CF | B9 | R/W | latch | ;vcg |
Extended VCLK Test 0 | 3CF | BA | R/W | ||
Extended VCLK Test 1 | 3CF | BB | R/W | ||
Extended MCLK Test 0 | 3CF | BC | R/W | ||
Extended MCLK Test 1 | 3CF | BD | R/W | ||
Extended XT Control | 3CF | BE | R/W | ||
Extended XB Control | 3CF | BF | R/W | ||
Extended Programmable Bit 0 | 3CF | XB0 | R/W | ||
Extended Programmable Bit 1 | 3CF | XB1 | R/W | ||
Extended Programmable Bit 2 | 3CF | XB2 | R/W | ||
Extended Video Memory Starting Address Low | 3CF | C0 | R/W | ||
Extended Video Memory Starting Address Mid | 3CF | C1 | R/W | ||
Extended Video Memory Starting Address High | 3CF | C2 | R/W | ||
Extended Video Memory Fetch Pitch Low | 3CF | C3 | R/W | ||
Extended Video Memory Fetch Pitch High | 3CF | C4 | R/W | ;64 bits | |
Extended Video Display Horizontal Starting Pixel Low | 3CF | C5 | R/W | ||
Extended Video Display Horizontal Starting Pixel High | 3CF | C6 | R/W | ||
Extended Video Display Horizontal Ending Pixel Low | 3CF | C7 | R/W | ||
Extended Video Display Horizontal Ending Pixel High | 3CF | C8 | R/W | ||
Extended Video Display Vertical Starting Line Low | 3CF | C9 | R/W | ||
Extended Video Display Vertical Starting Line High | 3CF | CA | R/W | ||
Extended Video Display Vertical Ending Line Low | 3CF | CB | R/W | ||
Extended Video Display Vertical Ending Line High | 3CF | CC | R/W | ||
Extended Video Display Memory Offset Phase | 3CF | CD | R/W | ||
Extended Video Color Compare Red | 3CF | CE | R/W | ||
Extended Video Color Compare Green | 3CF | CF | R/W | ||
Extended Video Color Compare Blue | 3CF | D0 | R/W | ||
Extended Video Horizontal DDA Initial Value Low | 3CF | D1 | R/W | ||
Extended Video Horizontal DDA Initial Value High | 3CF | D2 | R/W | ||
Extended Video Horizontal DDA Increment Value Low | 3CF | D3 | R/W | ||
Extended Video Horizontal DDA Increment Value High | 3CF | D4 | R/W | ||
Extended Video Vertical DDA Initial Value Low | 3CF | D5 | R/W | ||
Extended Video Vertical DDA Initial Value High | 3CF | D6 | R/W | ||
Extended Video Vertical DDA Increment Value Low | 3CF | D7 | R/W | ||
Extended Video Vertical DDA Increment Value High | 3CF | D8 | R/W | ||
Extended Video FIFO Low Control | 3CF | D9 | R/W | ||
Extended Video FIFO High Control | 3CF | DA | R/W | ||
Extended Video Format Control | 3CF | DB | R/W | ||
Extended Video Display Control I | 3CF | DC | R/W | ||
Extended Video FIFO Control I | 3CF | DD | R/W | ||
Extended Video Miscellaneous Control I | 3CF | DE | R/W | ||
Extended Video ROM Test Address | 3CF | DF | R/W | ||
Extended Video ROM VCR4R Low | 3CF | E0 | R | ||
Extended Video ROM VCR4R High | 3CF | E1 | R | ||
Extended Video ROM VCR4G Low | 3CF | E2 | R | ||
Extended Video ROM VCR4G High | 3CF | E3 | R | ||
Extended Video ROM UCR4R Low | 3CF | E4 | R | ||
Extended Video ROM UCR4R High | 3CF | E5 | R | ||
Extended Video ROM UCR4G Low | 3CF | E6 | R | ||
Extended Video ROM UCR4G High | 3CF | E7 | R | ||
Extended Video VFAC Control and Capture Mode I | 3CF | E8 | R/W | ||
Extended Video VFAC Control and Capture Mode II | 3CF | E9 | R/W | ||
Extended Video VFAC Control and Capture Mode III | 3CF | EA | R/W | ||
Extended Capture Memory Starting Address Low | 3CF | EB | R/W | ||
Extended Capture Memory Starting Address Mid | 3CF | EC | R/W | ||
Extended Capture Memory Starting Address High | 3CF | ED | R/W | ||
Extended Capture Memory Fetch Pitch Low | 3CF | EE | R/W | ||
Extended Capture Control Miscellaneous | 3CF | EF | R/W | ||
Extended MISC0 | 3CF | F0 | R | ||
Extended MISC1 | 3CF | F1 | R | ||
Extended MISC2 | 3CF | F2 | R | ||
Extended MISC3 | 3CF | F3 | R | ||
Extended MISC4 | 3CF | F4 | R | ||
Extended VUMA Configuration | 3CF | F5 | R | ||
Extended VUMA Extended Address) | 3CF | F6 | R | ||
Extended VUMA Arbitration Value | 3CF | F7 | R | ||
Extended EDO Memory | 3CF | F8 | R/W | ||
Extended Video Plannar Mode | 3CF | F9 | R/W | ||
Extended Indirect Index For 4X | 3CF | FA | R/W | ||
Extended Not Used | 3CF | FB | R/W | ||
Extended YUV Value Offset Low | 3CF | FC | R/W | ||
Extended YUV Value Offset High | 3CF | FD | R/W |
NAME | PORT | INDEX | VGA | RESET | ;Remarks |
CRTC Index register | 3C4 | R/W | 0 | set this register to set the index for 3C5 access | |
Extended Video Index register | 3CE | R/W | 0 | set this register to set theindex for 3CF access |