Phys Start |
End |
Virtual Start2 |
PCI Start1 |
Cachable |
Comments |
0000.0000 |
01FF.FFFF |
0 and C0000000 |
0000.0000 |
y |
32 meg SDRAM, will be subdivided by the OS |
4000.0000 |
4000.FFFF |
|
|
? |
DRAM mode registers |
4100.0000 |
410F.FFFF |
E18x.xxxx |
|
y3 |
1 meg flash ROM, you will probably want to set up an alias which is non-cachable, non-burst,
for when you want to write to the FLASH |
4200.0000 |
420F.FFFF |
E10x.xxxx |
|
? |
CSR |
5000.0000 |
5000.0FFF |
E130.0xxx |
|
y |
StrongARM cache flush (no stalls) |
7800.0000 |
7800.0FFF |
E120.0xxx |
|
y |
PCI write flush |
7900.0000 |
7900.0003 |
E110.0000 |
|
n |
PCI IACK address |
7B00.0000 |
7BFF.FFFF |
E01x.xxxx |
|
n |
PCI config |
7C00.0000 |
7C00.0FFF |
E000.0xxx |
|
n |
PCI I/O space |
8000.0000 |
80FF.FFFF |
D0xx.xxxx |
08xx.xxxx |
y |
direct, burst access to VGA image |
9000.0000 |
9000.FFFF |
D100.xxxx |
|
n |
modem codec |
A000.0000 |
A000.00FF |
E140.00xx |
2000.00xx |
n |
direct, burst access to Ether100 |