Memory Management on the StrongARM® SA-110 Application Note

The SA-110 is the first StrongARM® implementation of the ARM™ architecture. This document provides an overview of memory management followed by details specific to the ARM architecture and the SA-110 implementation itself. The MMU (memory management unit) model for the ARM architecture is described along with its relationship to cache and write buffer control. Behavior of the SA-110 is then discussed and sample code provided for a simple one-to-one mapped virtual-to-physical translation.

ARM is a trademark and StrongARM is a registered trademark of ARM, Ltd.

File Name/Size:
27819101.pdf
264843 bytes
Download From:
U.S. FTP Server (Download within North America)
Mirror FTP Sites (Download from international areas)
U.S. Web Server (Available for byte serving)